The present invention relates generally to integrated circuits. More particularly, it pertains to a structure and method for an electronic assembly.
Integrated circuits form the basis for many electronic systems. Essentially, an integrated circuit includes a vast number of transistors and other circuit elements that are formed on a single semiconductor wafer or chip and are interconnected to implement a desired function. The complexity of these integrated circuits requires the use of an ever increasing number of linked transistors and other circuit elements.
Many electronic systems are created through the use of a variety of different integrated circuits; each integrated circuit performing one or more specific functions. For example, computer systems include at least one microprocessor and a number of memory chips. Conventionally, each of these integrated circuits is formed on a separate wafer or chips, packaged independently and interconnected on, for example, a printed circuit board.
As integrated circuit technology progresses, there is a growing desire for a xe2x80x9csystem on a chipxe2x80x9d in which the functionality of all of the integrated circuits of the system are packaged together without a conventional printed circuit board. Ideally, a computing system would be fabricated with all the necessary integrated circuits on one wafer, as compared with today""s method of fabricating many chips of different functions and packaging them to assemble a complete system. Such a structure would greatly improve integrated circuit performance and provide higher bandwidth.
In practice, it is very difficult with today""s technology to implement a truly high-performance xe2x80x9csystem on a chipxe2x80x9d because of vastly different fabrication processes and different manufacturing yields for the logic and memory circuits.
As a compromise, various xe2x80x9csystem modulesxe2x80x9d have been introduced that electrically connect and package integrated circuit devices which are fabricated on the same or on different semiconductor wafers. Initially, system modules were created by simply stacking two semiconductor chips, e.g. a logic and memory chip, one on top of the other in an arrangement commonly referred to as chip-on-chip (COC) structure. Chip-on-chip structure most commonly utilizes micro bump bonding technology (MBB) to electrically connect the two chips. Several problems, however, remain inherent with this design structure. One serious complication includes the heating which occurs most seriously in connection with a logic chip such as a microprocessor. In high-performance microprocessors, where the microprocessor runs at a high speed, e.g., on the order of 500 MHz, the microprocessor can dissipate a large quantity of heat such that cooling becomes a crucial issue.
Thus, it is desirable to develop an improved structure and method for cooling integrated circuits in electronic systems. Additionally, the improved structure and method should accommodate a dense integration and packaging for semiconductor chips, e.g. logic and memory chips.
The above mentioned problems with integrated circuits and other problems are addressed by the present invention and will be understood by reading and studying the following specification. An electronic assembly is formed around a semiconductor interposer with cooling channels that are formed through the semiconductor interposer. In some embodiments, the cooling channels are filled with a liquid or refrigerant.